Can 'AMD-only' RAM really be restricted to AMD chipsets, and if so, why?

It is true that for the AM2 chipset (DDR2) and early on in the AM3 (DDR3) chipset era, AMD supported higher density RAM than Intel did. Intel started supporting the higher density RAM, but I can't find the exact chipset on which it was introduced.

Essentially AMD provided an additional physical address line per RAM page (11 vs. std 10) which doubles the amount of memory that can be addressed on a RAM stick, allowing their chipsets to use the high density RAM. For example, a DDR2 stick for an Intel chipset may have had 8 memory chips, each with a capacity of 128 MB, resulting in 1 GB stick. AMD, with the additional address bit, could use a stick with 4 256 MB chips, also with a total of 1 GB.

The net benefit for AMD users was a slightly lower cost per GB of RAM and a higher max capacity per chip as compared to Intel.

I would bet that this high density memory would have worked fine in an intel motherboard (all other parameters assumed to be compatible), but it would only see half the capacity.

The best write up I could find on this was buried at OCZ Technologies website and was only available from archive.org: http://web.archive.org/web/20100210134333/http://www.ocztechnology.com/products/memory/ocz_ddr2_pc2_5400_am2_special_high_density_kit-eol

With 11 column address bit support by the AM2 memory controller, the number of addresses in each row or page can be as high as 2048 individual entries for a page size of 16kbit. Unlike modules based on standard 10-bit column address chips with an "8k" page size, the new Titanium AM2 Special modules take advantage of the AM2 controller's feature set and provide a single rank solution with 2GB density using 16k pages. This allows the controller to stay in page twice as long compared to standard memory architectures, thereby achieving unparalleled performance.

That was a good question.

What is happening in most of them is that they are based on x4 chips instead of the x8 chips normally used, which was never officially supported by JEDEC on unbuffered DIMMs and don't work on Intel.