How to amplify a tiny signal riding on a large common mode square wave

Common mode changes slowly, signal changes fast.

What you thus need is a high-pass filter, which filters out the DC component. In the easiest case: that's a capacitor in series with your signal source, with a resistor to ground to "short" low frequency content. here's an easy-to-use RC high-pass design tool. Start with something like C=10nF. You seem to be very concerned with preserving voltages: that's the job of designing a proper filter, and this tool helps. You'll need to figure out the signal of interest's frequencies first!

You'd get a spike at the high-pass filter output for every one of your "blue" signal's edges (because that edge is a very fast changing signal).

After the high-pass filter, you only get your signal of interest centered around whatever bias you use (hint: you resistor from the filter can also be split into a voltage divider between supply voltage and ground, so that you can bias your signal into the center of your amplifier's operating range). Then, you just amplify that, so that the signal of interest spans as much as possible of your ADC range.

The spike that you'll get when the high pass filter sees your clock's edge is not that bad, filter it out digitally. (you'll not lose many samples to that spike's "overamplification") Especially if you know the period of the blue signal, digitally filtering it gets very easy.

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Don't forget:

You're using an ADC. You hence must also have a low pass filter that limits the bandwidth that reaches your ADC to half your sampling rate! Otherwise, you'd get aliasing, and your signal will be unusable.

A possible solution, is to use a slew-rate-limited amplifier on this signal, in combination with AC coupling. The step size, then, would be diminished while slower-slewing ripple is passed through. Some external-compensation-capacitor op amps can do this with an oversized compensation capacitor.

Another would be synchronous gating, so that a series of measurements is made, and those measurements are separated into 'low-V', 'transition', and 'high-V' data sets.
If your clock signal is known, it can be phase-locked to create the bin addresses (an internal counter locked to the clock that repeats '0', '1', '2') for separating the data points. I have done this with multiple data recorders, by enabling the appropriate ones during each phase.

And, if there is enough range in your ADC, the whole signal could be digitized and sorted out in software, later; it would mean curve-fitting to a best-fit square wave, then subtracting that square wave from the data.