How to disable processor's L1 and L2 caches?

You can accomplish this with a little ASM code, see chapter 11 of the Intel System Programming Guide

11.5.3 Preventing Caching

To disable the L1, L2, and L3 caches after they have been enabled and have received cache fills, perform the following steps: 1. Enter the no-fill cache mode. (Set the CD flag in control register CR0 to 1 and the NW flag to 0. 2. Flush all caches using the WBINVD instruction. 3. Disable the MTRRs and set the default memory type to uncached or set all MTRRs for the uncached memory type (see the discussion of the discussion of the TYPE field and the E flag in Section 11.11.2.1, “IA32_MTRR_DEF_TYPE MSR”).

I'm not aware of a Python module that implements this.

You can not do it directly in Python, as you need a kernel module to do that (and root rights to load that module).

See http://lxr.free-electrons.com/source/arch/arm/mm/cache-v7.S#L21 for what it takes to invalidate the L1 cache (invalidate, not disable).

Different CPU architectures (e.g x86 vs ARM) require different assembly code (CPU instructions) to disable the cache. I'm not sure if the Linux kernel has any possibility to disable the L1/L2/L3/L4 caches and if it would have that, I believe it would be just used internally for a short period of time, as the CPU is slow without these caches.

See Is there a way to disable CPU cache (L1/L2) on a Linux system? for a link on how you can disable the cache on an x86/x64 system (you need to change the register cr0). For ARM check Cache disabled behavior.

I'm not sure that you completely understand what the CPU caches do. Can you please elaborate why you want to cripple the performance of your system?