Are there any Analog FPGAs?

I've used a product line called the Electronically Programmable Analog Circuit (EPAC), probably more than ten years ago by now, which claimed to be the analog equivalent of an FPGA, and Cypress has for years produced a line called the PSoC (Programmable System On Chip) which incorporates a switchable arrays of both analog and digital circuitry. Note that in both cases the devices have a moderately small number of functional blocks (3 to 24 or so in the case of the PSoC) with somewhat limited routing options, rather than providing hundreds or thousands of blocks with enough interconnects to allow essentially arbitrary routing.

One reason that analog FPGA's don't offer anywhere near the design flexibility of digital devices is that even if one passes a digital signal through dozens or hundreds of levels of routing and logic circuitry, each of which has a 10dB signal-to-noise ratio (SNR), meaning there's 1/3 as much noise as signal, the resulting signal can be clean. By contrast, getting a clean signal from an analog device requires that every stage the signal goes through must be clean. The more complex the routing, the more difficult it is to avoid picking up stray signals.

In applications that aren't too demanding, having a small amount of analog circuitry combined into a chip can be useful. For example, I've designed a music box which uses a PSoC to drive a piezo speaker directly; the PSoC includes a DAC, a fourth-order low-pass filter, and output amplifier. It wouldn't have been hard to use a separate chip to do the filtering and amplification, but using the PSoC avoided the need for an extra chip.


This is the first shot from Google; seems to be a very new technology, and only a few manufacturers are producing them.

I don't know if the analog part is flexible as the FPGA block, but for sure it combines the features.

UPDATE: In the Actel there is only an integrated ADC (ASIC) and a fixed number of analog inputs, depending on the model.


Years ago, Lattice had a series called ispPAC with different configurations of in-system-programmable analog blocks. More CPLD-level complexity than FPGA-level. These are all now obsolete.

I suspect there is simply too much variation in requirements across different analog applications to allow one chip to "do it all". For example, in one design you might need a ADC input buffer with 16-bit accuracy; in another you might need only want 8-bit accuracy and want to keep the cost as low as possible. There's no way a general-purpose programmable block could simultaneously suit both of those applications.