Is there a more efficient alternative to pull down resistors?
Note that the current is wasted regardless of whether the circuit is "on" or "off" — when it is "on" the voltage drop across R11 is only slightly less than when it is "off".
Using a PMOS transistor instead of the PNP would mean that the pulldown resistor could be on the order of megohms, reducing the "leakage" current to microamps.
Or you could use a different strategy altogether, eliminating the off-state current entirely:
simulate this circuit – Schematic created using CircuitLab
Better still, combine both ideas and get minimal wasted current in the on-state, too:
simulate this circuit
You could use a PMOS FET in place of Q1. Then R11 could be 50k or 100k instead of 10k, reducing leakage in the off position.
You could use a separate "off" switch, or a special rotary switch with a special "off" position that disconnects VCC from the transistor altogether.
You could use three Schottky rectifiers in place of the transistor and pull-down. Place anodes to switch pins 1, 2, 4, cathodes tied together to "feed main circuit." Disconnect pin 5 so it becomes "true off." The "feed main circuit" will be about 0.25v lower than Vcc.