Low input voltage noise nV/√Hz
The datasheet says Low input voltage noise: 2.2 nV/√Hz. The parameter is really just input voltage noise, and they are saying that it's low to make the part sound more awesome.
The noise is usually modelled as having a constant spectral density. Thus, the spectral density of noise power would be specified in \$\mathrm{W/Hz}\$. The higher the bandwidth (for an ADC, this depends on your sampling rate), the more spectrum there is with noise in it, so the more total noise power there is in your measurement.
However, this parameter is voltage noise. Power is proportional to the square of voltage:
$$ P = \frac{E^2}{R} $$
So if \$R\$ is constant, and in this case it's the input impedance of the ADC, which is approximately constant, and you want just the voltage component of the noise (because the ADC measures voltage, not power), then you need to take the square root of the noise power, and you are left with a measurement in units \$\mathrm{V/\sqrt{Hz}}\$.
With this parameter, you can know how much voltage noise there will be, and thus, how much noise there will be in your measurements. So let's say your input bandwidth is 24 kHz. Take the square root of this, and multiply it by the input voltage noise spectral density to get the RMS noise voltage:
$$ \require{cancel} \frac{2.2\:\mathrm{nV}}{\cancel{\sqrt{\mathrm{Hz}}}} \sqrt{24000}\cancel{\sqrt{\mathrm{Hz}}} \approx 341\:\mathrm{nV_{(RMS)}}$$
This means that the measurements you get from the ADC will look like noise with an RMS amplitude of 341 nV was added to your signal if the input bandwidth is 24 kHz. More bandwidth means more noise, less bandwidth, less noise.
Further reading: ADC Input Noise: The Good, The Bad, and The Ugly. Is No Noise Good Noise?
Good answer from Phil Frost. Here's some more data that may be useful on your application. The 3dB bandwidth of the driver at a gain of 2 (single ended to differential) is 1GHz and at this frequency the noise level of 2.2 nV/√Hz will produce about 70uV RMS (x 2) into the ADC.
This is gaussian noise and a lot of folk will attempt to put a peak to peak figure on this by using standard deviation. A common number of standard deviations to use is 6.6 and this means the peak to peak equivalent of the RMS noise is 920uVp-p into the ADC.
Using 6.6 sigma is basically the same as saying the 920uVp-p will not be exceeded for 99.99% of the time. Here is a data sheet from Analog Devices that will help you understand it a little more in depth. It's entitled "Peak to Peak resolution versus effective resolution" and is there AN6-5 application note. Although it applies to slow ADCs it gives general information.
Going back to your application and dependant on your ADC's number of bits and full-scale input range you should be able to calculate the digital noise you are going to get with no signal. If it is too high you may decide to band limit the ADA4937. This isn't as easy as putting feedback caps across resistors because the re is a liklihood you'll create a non-linear frequency response so applying the filter has to be done with care - take a look at figure 64 in the data sheet. It shows you how to construct a 2nd order low-pass filter between driver and ADC. This particular circuit has a 3dB bandwidth of 100MHz suitable for a sampling frequency of 10MSps.
If your sampling rate is only 1MSps you ought to consider a filter that has a bandwidth of maybe 100kHz. Figure 66 has a 1st order filter suitable for a much higher sampling rate of 125MSps. See also fig 67 for other applications of inserting a filter to reduce the noise.