‘One for all’ standardized land pattern v.s. specified land pattern in datasheet

The correct footprint to use for a component land is 'one that works'.

This isn't so flip as it sounds.

What does a land pattern have to do in order to 'work'?

a) it must connect each component leg to its pad
b) it must not connect it to adjacent pads
c) it must pull the component into correct alignment when the solder is liquid
d) it must be visually inspectable

These taken together mean the lands must be at least as big as the lead, but not too close together. There is considerable latitude in how much bigger the lands can be. It's this wide latitude that allows there to be multiple designs.

A land that is much bigger will satisfy (a) and (d), but might get solder stuck between the lands so fall foul of (b).

Whether a particular footprint is solderable without getting connectivity between lands depends to a large extent on the process the board assembler uses, and to some extent on the thermal capacity and lead positioning accuracy of the component. If different manufacturers use different assembler processes to refine the footprint, it's not surprising that they might end up with slightly different pad sizes.

What is surprising is that the process works as well and as often as it does.

A case in point. I was once using a 0402 packaged diode, and the manufacturer was aiming it towards very small, so very high packing density, boards. As a result, they specified a land pattern that had copper areas exactly the same size as the component pads. This resulted in a small solder volume with no side or toe fillets, that our particular in-house reflow process often failed to assemble properly. I had to fight our reactionary production manager and his 'always use the manufacturers recommendation' footprint policy to use lands that were larger and more suited to our solder process. Once we had more solder, and fillets, the yield went back to 100%. It's likely that were we using a thicker solderpaste stencil it would have soldered OK, but that would have been inappropriate for our other components with their more generous lands.

In my experience, you can safely stick to the IPC standards, which by the way also suggest three different footprints for each part: Least, Most, and Nominal. It is up to you which one to select, depending mostly on the manufacturing process. In most cases you will use the Nominal pad sizes.

In general terms, the footprint that is suggested by the manufacturers on the datasheet, is simply what they have used to design the evaluation kits, and worked well for the process they used; I can tell you this, because I used to work for one of the big semiconductor companies, and this is what happened. The footprints were usually derived from the IPC standards, which should always be your reference, unless it is a completely non standard part.

When it comes to mass production you will go through enough PCB revisions to optimise the footprint, and at that point the PCB manufacturer/assembly house will take over and modify the land patterns to match their manufacturing process, and ensure good yield.