Program for drawing VHDL block diagrams?

There's nothing open-sourced anyways. A while back, I looked for something simliar for verilog designs with no success.

Altera's Quartus can compile VHDL and provide you with the top-level schematic blocks, representing the VHDL signals. Ditto with Xilinx ISE. Its not open source software, but it is free to download and use.