Relationship between I2C drawn energy / power consumption and data rate

The I2C data and clock lines draw power when they get pulled low. Because then power is sunk through the pull-up resistors.

While a line is pulled low it will draw 5V/4.7k\$~\Omega \approx\$ 1mA. Assuming 5V VCC and 4.7k pullup resistors.

The clock line will have a 50% duty cycle. The data line is low at least 1 out of every 9 clock cycles (every ack for a successful byte) but you are rarely going to send/receive only 0xff bytes. It's more likely going to be pulled low 75% of the time.

But indeed faster clock means shorter transmission which means less power lost through the pull-ups. However faster transmission may require lower value resistors to overcome the parasitic capacitance between the lines and ground.

Your thinking is correct, as long as you can achieve a higher speed with the same pull up resistors.

Higher clock frequency usually require lower pull-up value, thus increasing the current.

Increasing the clock frequency from 100kHz to 400kHz usually requires the pull-up to be reduced with a factor of 4-5.

Since the power is inverse proportional to the resistance the power consumed will be almost the same.