New posts in Intel

How are x86 uops scheduled, exactly?

Why is Skylake so much better than Broadwell-E for single-threaded memory throughput?

Deoptimizing a program for the pipeline in Intel Sandybridge-family CPUs

Detect if processor has RDTSCP at compile time

What branch misprediction does the Branch Target Buffer detect?

Is there a compiler hint for GCC to force branch prediction to always go a certain way?

I can't install intel HAXM

How can I find the micro-ops which instructions on Intel's x86 CPUs decode to?

Micro fusion and addressing modes

x86-64 canonical address?