What causes jitter?
On chip jitter can arise through various mechanisms, but I'll address only the principal mechanisms that affects digital chips here since you don't define what type of circuit.
Lets just take the case of a simple invertor. Here is one from Wikipedia.
When the signal "A" is swinging (either +'ve to -'ve or vice versa, it doesn't matter) the inverter can be viewed as a very high gain amplifier. At some point in the swing the output will start to move and with very little incremental change on the input the output slews rapidly. This means that any variation on the input will be magnified on the output and manifests itself as a change in slewing rate or the timing on the transition or both. This variability can arise because of the noise in the transistors themselves or from noise on the rails. As any movement on the voltage rails (Vdd or Vss) is directly coupled into the output signal through the transistor. Which means that the predicability of the output transient is dependent upon the rails not having any voltage fluctuations.
There are many factors that may cause clock jitter. Going off some of the examples from the Altera page I'll hit upon a couple of big ones.
Theres a lot of different types of oscillator circuits.. so I'll touch upon the most commonly seen ones.
There is the common quartz crystal oscillator (XOs), theres also voltage controlled crystal oscillators (VCXOs), temperature compensated VCXOs (TCVXOs), phase-locked loop (PLL)(which has a tunable oscillator), and delay locked loops (DLL), and digitally controlled oscillators (DCO) to name a few. I won't go into less reliable oscillators like an LC oscillator because they are generally not used in anything except for very low speed, time insensitive circuits.
Temperature: This affects the the common crystal oscillator the most, changes in temperature cause minute changes in the size and shape of crystal, thus changing its frequency. For critical applications, you can get TCVCXOs, although they are cost prohibitive and a well designed PLL or DLL circuit is typically well temperature compensated. PLLs work because they have a variable frequency oscillator that has a feedback to compensate for the changes in frequency drift due to temperature and voltage.
Power Supply: Changes in voltage especially noise on the power lines can cause jitter. Switching noise caused by high-speed or high-drive I/O cause voltage to shift during switching which can couple with the rest of the system. As Vcc changes, device propagation times changes, introducing jitter. This is especially important in voltage-controlled oscillators because, like the name implies, they are voltage controlled and changes in the power supply directly affect their frequency, introducing jitter.
There are other phenomena that directly affect the power supply that end up indirectly affecting the stability of the clock, such as induced EMF and EMI.
Noise: I've already touched on switching noise, but theres a lot that factors into noise. Like ground bounce. Because in the real world everything is non-ideal, package leads introduce inductance and during switching can cause a shift in the ground level because of the induced voltage.
Vibration: Quartz crystals are sensitive devices, and so mechanical vibrations cause a time-change in the frequency in the device. Crystal oscillators work by the mechanical resonance of the crystal itself due to an applied voltage, so physical vibration would logically also cause some frequency change.
All this stuff becomes important in very high speed very sensitive circuits.. but I hope I answered the question.
Heres a paper from Fairchild Semi that goes over some the stuff I've said and then some. Wikipedia's page on crystal oscillators is also pretty decent. http://www.elenota.pl/datasheet_download/87191/MS-566