What does an NMOS transistor with the gate connected to the drain do?

Those are depletion-mode1 NMOS transistors. They function as pull-ups or "loads" (effectively resistors) for the wired-NOR NMOS logic. When the source+gate connection is pulled low, they basically become current sources.

The key point is that pull-down (enhancement mode) transistors are placed at the cross-points in both the AND-plane on the left and the OR-plane on the right in order to implement the desired logic functions. The result is a direct implementation of a sum-of-products form of logic.

schematic

simulate this circuit – Schematic created using CircuitLab


1 As indicated by the fat "channel" line; an old shorthand notation. The other transistors in the diagram are the more familiar enhancement-mode devices.


To add to previous answer, reason is to use MOSFET as resistors caused that on IC level resistors are really space costly compared to good old MOSFET. Compare size of 90nm PMOS and 500 ohm poly resistor on the picture. (90 nm ST CMOS tech)Bottom is 90nm PMOS and bottom is a 500 Ohm poly resistor.