Why would a buck converter IC fail and blow up?
I suspect overvoltage on the chip, with a second possibility inductor saturation as @oldfart suggested in a comment.
Your supply bypass is an electrolytic capacitor, a little far from the chip and is a small electrolytic so it has a relatively high ESR (and, unfortunately, an ESR that will increase as the capacitor ages).
The input ripple current, in combination with stray inductance from wiring can lead to overvoltage on the chip input. I suggest testing it with a supply with long wires and test at the limits of the supply range. Put an oscilloscope on the power rails and see how big the spikes are. A ceramic 22 µF capacitor with an electrolytic (e.g. 1000 µF/25 V 105 °C) in parallel, if you have room, would be much better. Check that the "22 µF" ceramic is over 10 µF at the maximum operating voltage. It should be as close as practical to the chip. And, of course, it's best to follow the suggested layout practices in the datasheet as closely as practical.
Inductor saturation is a different issue- it would tend to occur at minimum supply voltage where the input current is maximum. You can test it by bypassing your undervoltage lockout and reducing the input well below the minimum normally expected. Symptoms would be excessive power dissipation in the chip.
Problem: cheap high ESR capacitor and ignoring design application notes.
Edit
Ignoring car applications if it does not apply, take note of requirement for low ESR capacitors.
For this design two TDK C3216X5R0J226M 22 μF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.286 A and each output capacitor is rated for 4 A.
Note that 22 μF * 2 mΩ = τ = 0.044 μs is excellent ceramic performance, where low ESR electrolytic capacitors are < 1 μs and general purpose electrolytic capacitors >> 100 μs. Since f >> 50 kHz this is critical for regulation and improved with three of the suggested parts in parallel.
It is impossible to achieve this low ESR*C = τ in an aluminum electrolytic capacitor, even with ultra-low ESR types. This is why ceramic is used in this design.
If the ESR is too high and reactive step loads are applied then there is more chance for instability, higher ripple voltage, and overshoot.
If you do not have automotive design or test specifications or a DVT test plan with stress testing, this design had not been completed properly.
The datasheet recommends C4 to be a low ESR ceramic capacitor (20 µF to 68 µF). You seem to have a 22 µF electrolytic. All datasheet examples show two 10 µF in parallel. The actual value probably depends on the frequency. I have no idea if this may or may not be a problem. But...
I've had MC34063 fail, because the input capacitor was inappropriately low or had high ESR. Failure usually occurred at power off, but that may not be relevant here.