New posts in X86

How does the indexing of the Ice Lake's 48KiB L1 data cache work?

Understanding TLB from CPUID results on Intel

Getting the caller's Return Address

x86 Program Counter abstracted from microarchitecture?

Enable/Disable Hardware Lock Elision

Fast interleave 2 double arrays into an array of structs with 2 float and 1 int (loop invariant) member, with SIMD double->float conversion?

Who Decides Between I/O Mapped and Memory Mapped I/O (x86)

Fastest way to expand bits in a field to all (overlapping + adjacent) set bits in a mask?

Linux memory segmentation

rdpmc: surprising behavior