Why do layout footprints for Crystals often define via keepouts?

The green "shaded" area is the vRestrict area, which restricts the placement of vias in the designated area for design-rule checking (DRC). Why is this an important consideration?

Because the metallic (and therefore conducting) crystal can is laid flat and could make contact to exposed PCB traces that are not covered with solder resist. Typically, vias are not covered with solder resist. However, it's not a good idea to put any copper traces (covered in solder resist or not) in the area directly under the metal can.

You can use an insulating pad of course then it's OK.

The metallic crystal casing might short vias. tRestrict is the only way of preventing tracks from being laid under the crystal, unfortunately it also prevents copper pour, even though it's considered a good practice to lay the copper. In theory it adds capacitance, but that shouldn't have an effect for a mechanical resonator and it doesn't load the resonator circuit too much. Having bRestrict sounds overcautious to me.

Some of the things a designer might think about:

• EMI: the signal from the Xtal_out pin to the crystal has a strong, high-frequency signal; if there are any other traces near/under the crystal, they could pick up some of this signal, which might directly interfere with their function -- and even if they are digital lines and it doesn't interfere with their function, they might re-radiate that signal and cause the device to fail radio EMI emissions test.
• EMC: the signal from the crystal to the Xtal_in pin is often relatively weak; if there are any strongly-driven digital traces near/under the crystal, they might interfere with this signal and cause jitter / frequency shift.
• short circuits: While vias are often covered with solder resist ("tented"), sometimes the tenting is incomplete (partially exposing bare copper); sometimes boards are manufactured "without tenting", completely exposing the copper at the via. The metal case of the crystal would short out those signals.

Most design guides for oscillators recommend a solid ground pour underneath the oscillator as part of a general ground pour over the entire PCB, for EMI/EMC reasons:

• AVR186: Best Practices for the PCB Layout of Oscillators
• TPS65950/30/20 32-kHz Oscillator Schematic and PCB Layout Guide
• Oscillator

So we don't want any signal anywhere under/near the crystal or the Xtal_out / Xtal_in lines connecting it to the IC. But we do want a solid ground pour under it.

we would put a pad of ground under the crystal with a couple of through holes (or a bare spot) and either wrap a wire over the can soldered down or solder the can directly to the PCB. -- mtripoli